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PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
Rev. 02 -- 09 May 2002 Product data
1. Description
The PCF8582C-2 is a floating gate Electrically Erasable Programmable Read Only Memory (EEPROM) with 2 kbits (256 x 8-bit) non-volatile storage. By using an internal redundant storage code, it is fault tolerant to single bit errors. This feature dramatically increases the reliability compared to conventional EEPROMs. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. Data bytes are received and transmitted via the serial I2C-bus. Up to eight PCF8582C-2 devices may be connected to the I2C-bus. Chip select is accomplished by three address inputs (A0, A1 and A2). Timing of the E/W cycle is carried out internally, thus no external components are required. Programming Time Control (PTC), Pin 7, must be connected to either VDD or left open-circuit. There is an option of using an external clock for timing the length of an E/W cycle.
2. Features
s Low power CMOS: x 2.0 mA maximum operating current x maximum standby current 10 A (at 6.0 V), typical 4 A s Non-volatile storage of 2 kbits organized as 256 x 8-bit s Single supply with full operation down to 2.5 V s On-chip voltage multiplier s Serial input/output I2C-bus s Write operations: x byte write mode x 8-byte page write mode (minimizes total write time per byte) s Read operations: x sequential read x random read s Internal timer for writing (no external components) s Internal power-on reset s 0 to 100 kHz clock frequency s High reliability by using a redundant storage code s Endurance: 1,000,000 Erase/Write (E/W) cycles at Tamb = 22 C s 10 years non-volatile data retention time
Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
s Pin and address compatible to: PCF8570, PCF8571, PCF8572, PCA8581 and PCF85102 s Pin compatible with a different address to PCF85103 s ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 s Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA s Offered in DIP8 and SO8 packages.
3. Quick reference data
Table 1: Symbol VDD IDDR Quick reference data Parameter supply voltage supply current read fSCL = 100 kHz VDD = 2.5 V VDD = 6 V IDDW supply current E/W fSCL = 100 kHz VDD = 2.5 V VDD = 6 V IDD(stb) standby supply current VDD = 2.5 V VDD = 6 V 0.6 2.0 3.5 10 mA mA A A 60 200 A A Conditions Min 2.5 Typ Max 6.0 Unit V
4. Ordering information
Table 2: Ordering information Package North America PCF8582C-2P PCF8582C-2T PCF8582C2N PCF8582C2D Name DIP8 SO8 Description plastic dual in-line package; 8 leads (300 mil) plastic small outline package 8 leads (straight); body width 3.9 mm Version SOT97-1 SOT96-1 Type number
9397 750 08536
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 09 May 2002
2 of 20
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x
Product data Rev. 02 -- 09 May 2002
A2 A1 A0 3 2 1 VDD 8 4
002aaa090
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5. Block diagram
Philips Semiconductors
PCF8582C-2
SCL SDA 6 5 n INPUT FILTER I2C-BUS CONTROL LOGIC
BYTE COUNTER 3 ADDRESS SWITCH SHIFT REGISTER BYTE LATCH (8 bytes) ADDRESS POINTER
ADDRESS HIGH REGISTER
SEQUENCER
DIVIDER ( 128)
8
EEPROM
4
EE CONTROL
256 x 8-bit CMOS EEPROM with I2C-bus interface
TEST MODE DECODER
TIMER ( 16)
7
PTC
POWER-ON-RESET
OSCILLATOR
PCF8582C-2
VSS
3 of 20
Fig 1. Block diagram.
Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
6. Pinning information
6.1 Pinning
A0
1
8 V DD 7 PTC SCL SDA
A1 2
PCF8582C-2
A2 3 VSS 4
MGD928
6 5
Fig 2. Pin configuration.
6.2 Pin description
Table 3: Symbol A0 A1 A2 VSS SDA SCL PTC VDD Pin description Pin 1 2 3 4 5 6 7 8 Description address input 0 address input 1 address input 2 negative supply voltage serial data input/output (I2C-bus) serial clock input (I2C-bus) programming time control output positive supply voltage
7. Device addressing
Table 4: Selection Bit Device
[1]
Device address code Device code b7[1] 1 b6 0 b5 1 b4 0 b3 A2 Chip Enable b2 A1 b1 A0 R/W b0 R/W
The Most Significant Bit (MSB) `b7' is sent first.
A2, A1, A0 are hardware selectable pins. A system could have up to eight PCF8582C-2 devices on the same I2C-bus, equivalent to a 16 kbit EEPROM or 8 pages of 256 bytes of memory. The eight addresses are defined by the state of the A0, A1, A2 inputs (logic level `1' when connected to VDD, logic level `0' when connected to GND). Figure 3 shows the various address combinations.
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Product data
Rev. 02 -- 09 May 2002
4 of 20
Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
I2C-BUS
PCF8582C-2 DEVICE 1 256-BYTE PAGE
A2 0
A1 0
A0 0
PCF8582C-2 DEVICE 2 256-BYTE PAGE 0 0 1
PCF8582C-2 DEVICE 3 256-BYTE PAGE 0 1 0
PCF8582C-2 DEVICE 4 256-BYTE PAGE 0 1 1
PCF8582C-2 DEVICE 5 256-BYTE PAGE 1 0 0
PCF8582C-2 DEVICE 6 256-BYTE PAGE 1 0 1
PCF8582C-2 DEVICE 7 256-BYTE PAGE 1 1 0
PCF8582C-2 DEVICE 8 256-BYTE PAGE
002aaa246
1
1
1
Fig 3. Device addressing.
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Product data
Rev. 02 -- 09 May 2002
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Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
8. Functional description
8.1 I2C-bus protocol
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The serial bus consists of two bidirectional lines; one for data signals (SDA), and one for clock signals (SCL). Both the SDA and SCL lines must be connected to a positive supply voltage via a pull-up resistor. The following protocol has been defined:
* Data transfer may be initiated only when the bus is not busy. * During data transfer, the data line must remain stable whenever the clock line is
HIGH. Changes in the data line while the clock line is HIGH will be interpreted as control signals. 8.1.1 Bus conditions The following bus conditions have been defined: Bus not busy -- Both data and clock lines remain HIGH. Start data transfer -- A change in the state of the data line, from HIGH-to-LOW, while the clock is HIGH, defines the START condition. Stop data transfer -- A change in the state of the data line, from LOW-to-HIGH, while the clock is HIGH, defines the STOP condition. Data valid -- The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. There is one clock pulse per bit of data. 8.1.2 Data transfer Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of the data bytes, transferred between the START and STOP conditions is limited to 7 bytes in the E/W mode and 8 bytes in the Page E/W mode. Data transfer is unlimited in the read mode. The information is transmitted in bytes and each receiver acknowledges with a ninth bit. Within the I2C-bus specifications, a high-speed mode (100 kHz clock rate) and a fast speed mode (400 kHz clock rate) are defined. The PCF8582C-2 operates in only the high-speed mode. By definition, a device that sends a signal is called a `transmitter', and the device which receives the signal is called a `receiver'. The device which controls the signal is called the `master'. The devices that are controlled by the master are called `slaves'. Each byte is followed by one acknowledge bit. This acknowledge bit is a HIGH level, put on the bus by the transmitter. The master generates an extra acknowledge related clock pulse. The slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte.
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Product data
Rev. 02 -- 09 May 2002
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Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
The master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Set-up and hold times must be taken into account. A master receiver must signal an end of data to the slave transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master generation of the STOP condition. 8.1.3 Device addressing Following a START condition, the bus master must output the address of the slave it is accessing. The address of the PCF8582C-2 is shown in Figure 4. To conserve power, no internal pullup resistors are incorporated on the hardware selectable pins and they must be connected to either VDD or VSS.
1
0
1
0
A2
A1
A0 R/W
FIXED
HARDWARE SELECTABLE
002aaa173
Fig 4. Slave address.
The last bit of the slave address defines the operation to be performed. When set to logic 1, a read operation is selected, while a logic 0 selects a write operation. 8.1.4 Write operations Byte/word write: For a write operation, the PCF8582C-2 requires a second address field. This address field is a word address providing access to the 256 words of memory. Upon receipt of the word address, the PCF8582C-2 responds with an acknowledge and awaits the next eight bits of data, again responding with an acknowledge. Word address is automatically incremented. The master can now terminate the transfer by generating a STOP condition or transmit up to six more bytes of data and then terminate by generating a STOP condition. After this STOP condition, the E/W cycle starts and the bus is free for another transmission. Its duration is 10 ms per byte. During the E/W cycle the slave receiver does not send an acknowledge bit if addressed via the I2C-bus.
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Product data
Rev. 02 -- 09 May 2002
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Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from slave
S
SLAVE ADDRESS
0A
WORD ADDRESS
A
DATA
A
DATA
A
P
R/W auto increment word address auto increment word address
MBA701
Fig 5. Auto-increment memory word address; two byte write.
Page write: The PCF8582C-2 is capable of an eight-byte page write operation. It is initiated in the same manner as the byte write operation. The master can transit eight data bytes within one transmission. After receipt of each byte, the PCF8582C-2 will respond with an acknowledge. The typical E/W time in this mode is 9 x 3.5 ms = 31.5 ms. Erasing a block of 8 bytes in page mode takes typical 3.5 ms and sequential writing of these 8 bytes another typical 28 ms. After the receipt of each data byte, the three low-order bits of the word address are internally incremented. The high-order five bits of the address remain unchanged. The slave acknowledges the reception of each data byte with an ACK. The I2C-bus data transfer is terminated by the master after the 8th byte with a STOP condition. If the master transmits more than eight bytes prior to generating the STOP condition, no acknowledge will be given on the ninth (and following) data bytes and the whole transmission will be ignored and no programming will be done. As in the byte write operation, all inputs are disabled until completion of the internal write cycles.
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from slave
S
SLAVE ADDRESS
0A
WORD ADDRESS
A
DATA N
A
DATA N + 1
A
R/W auto increment word address auto increment word address
acknowledge from slave
DATA N + 7
A
A
last byte
002aaa245
auto increment word address
Fig 6. Page write operation; eight bytes.
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Product data
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Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
8.1.5
Read operations Read operations are initiated in the same manner as write operations with the exception that the LSB of the slave address is set to logic 1. There are three basic read operations: current address read, random read, and sequential read. Remark: The lower 8 bits of the word address are incremented after each transmission of a data byte (read or write). The MSB of the word address, which is defined in the slave address, is not changed when the word address count overflows. Thus, the word address overflows from 255 to 0, and from 511 to 256.
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from master
S
SLAVE ADDRESS
0A
WORD ADDRESS
A
S
SLAVE ADDRESS
1A
DATA
A
R/W
at this moment master transmitter becomes master receiver and EEPROM slave receiver becomes slave transmitter
R/W
n bytes auto increment word address
no acknowledge from master
DATA
1
P
last byte
MBA703
auto increment word address
Fig 7. Master reads PCF8582C-2 slave after setting word address (write word address; read data); sequential read.
acknowledge from slave
acknowledge from master
no acknowledge from master
S
SLAVE ADDRESS
1A
DATA n bytes
A
DATA last bytes
1
P
R/W
auto increment word address
auto increment word address
MBA704 - 1
Fig 8. Master reads PCF8582C-2 immediately after first byte (read mode); current address read.
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Product data
Rev. 02 -- 09 May 2002
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Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
9. Limiting values
Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDD Vi Ii Io Tstg Tamb Parameter supply voltage input voltage on any input pin input current on any input pin output current storage temperature operating ambient temperature |Zi| > 500 Conditions Min -0.3 VSS - 0.8 -65 -40 Max +6.5 +6.5 1 10 +150 +85 Unit V V mA mA C C
10. Characteristics
Table 6: Characteristics VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Supplies VDD IDDR supply voltage supply current read fSCL = 100 kHz VDD = 2.5 V VDD = 6.0 V IDDW supply current E/W fSCL = 100 kHz VDD = 2.5 V VDD = 6.0 V IDD(stb) standby supply current VDD = 2.5 V VDD = 6.0 V PTC output (pin 7) VIL VIH VIL VIH ILI fSCL Ci LOW level input voltage HIGH level input voltage LOW level input voltage HIGH level input voltage input leakage current clock input frequency input capacitance VI = VSS VI = VDD or VSS -0.8 0.9VDD -0.8 0.7VDD 0 0.1VDD VDD + 0.8 0.3VDD +6.5 1 100 7 V V V V A kHz pF 0.6 2.0 3.5 10 mA mA A A 60 200 A A 2.5 6.0 V Parameter Conditions Min Typ Max Unit
SCL input (pin 6)
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PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
Table 6: Characteristics...continued VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol VIL VIH VOL ILO Ci tS Parameter LOW level input voltage HIGH level input voltage LOW level output voltage output leakage current input capacitance data retention time IOL = 3 mA; VDD(min) VOH = VDD VI = VSS Tamb = 55 C Conditions Min -0.8 0.7VDD 10 Typ - Max 0.3VDD +6.5 0.4 1 7 - Unit V V V A pF years SDA input/output (pin 5)
Data retention time
11. I2C-bus characteristics
Table 7: I2C-bus characteristics All of the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input voltage swing from VSS to VDD; see Figure 9. Symbol fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tHD;DAT Parameter clock frequency bus free time between a STOP and START condition START condition hold time after which first clock pulse is generated LOW level clock period HIGH level clock period set-up time for START condition data hold time for bus compatible masters for bus devices tSU;DAT tr tf tSU;STO
[1]
[1]
Conditions
Min 0 4.7 4.0 4.7 4.0
Max 100 - - - - - - - - 1 300 -
Unit kHz s s s s s s ns ns s ns s
repeated start
4.7 5 0 250 - - 4.0
data set-up time SDA and SCL rise time SDA and SCL fall time set-up time for STOP condition
The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be internally provided by a transmitter.
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Product data
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Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
SDA
t BUF
t LOW
tf
t HD;STA
SCL
P
S
t HD;STA t HIGH
S
P
tr
t HD;DAT
t SU;DAT
t SU;STA
MBA705
t SU;STO
P = STOP condition; S = START condition.
Fig 9. Timing requirements for the I2C-bus.
12. Write cycle limits
Table 8: Write cycle limits Selection of the chip address is achieved by connecting the A0, A1 and A2 inputs to either VSS or VDD. Symbol tE/W Endurance NE/W E/W cycle per byte Tamb = -40 to +85 C Tamb = 22 C 100000 - 1000000 - - cycles cycles Parameter E/W cycle time Conditions internal oscillator external clock Min - 4 Typ 7 - Max - 10 Unit ms ms E/W cycle timing
13. External clock timing
tr tf
td
t HIGH
t LOW
PTC
1
2
257
SDA
SCL STOP
MBA697
Fig 10. One byte E/W cycle.
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Product data
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PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
td
tr
t HIGH
tf
t LOW n x 256 + 1
PTC
1
2
SDA
SCL STOP
MBA698
Fig 11. n bytes E/W cycle (n = 2 to 7).
td
tr
t HIGH
tf
t LOW
PTC
1
2
1153
SDA
SCL STOP
MBA699
Fig 12. Page mode.
SLAVE ADDRESS I C-bus S
2
WORD ADDRESS A DATA A DATA A P (1)
0A
HIGH PTC LOW
undefined 1 1 1 td 0 2 2 2 257 513 1153
undefined clock (2) clock (3) clock (4)
MBA700
negative edge SCL 8-bit
(1) If an external clock is chosen, this information is latched internally by setting pin 7 (PTC) LOW after transmission of the eighth bits of the word address (negative edge of SCL). Thus the state of pin 7 may be previously undefined. Leaving pin 7 LOW causes a higher standby current. (2) 1-byte programming. (3) 2-byte programming. (4) One page (8 bytes) programming.
Fig 13. External clock.
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PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
14. Package outline
DIP8: plastic dual in-line package; 8 leads (300 mil) SOT97-1
D seating plane
ME
A2
A
L
A1
c Z e b1 wM (e 1) b2 5 MH
b 8
pin 1 index E
1
4
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.14 0.068 0.045 b1 0.53 0.38 0.021 0.015 b2 1.07 0.89 0.042 0.035 c 0.36 0.23 0.014 0.009 D (1) 9.8 9.2 0.39 0.36 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 1.15 0.045
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT97-1 REFERENCES IEC 050G01 JEDEC MO-001 EIAJ SC-504-8 EUROPEAN PROJECTION
ISSUE DATE 95-02-04 99-12-27
Fig 14. DIP8 package outline (SOT97-1).
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Product data
Rev. 02 -- 09 May 2002
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Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 pin 1 index Lp 1 e bp 4 wM L detail X A1 (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
Fig 15. SO8 package outline (SOT96-1).
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PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
15. Soldering
15.1 Introduction
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
15.2 Surface mount packages
15.2.1 Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. 15.2.2 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
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PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
* For packages with leads on four sides, the footprint must be placed at a 45 angle
to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 15.2.3 Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
15.3 Through-hole mount packages
15.3.1 Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 15.3.2 Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
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PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
15.4 Package related soldering information
Table 9: Mounting Through-hole mount Surface mount Suitability of IC packages for wave, reflow and dipping soldering methods Package[1] DBS, DIP, HDIP, SDIP, SIL BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC[5], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO
[1] [2]
Soldering method Wave suitable[3] not suitable not suitable[4] Reflow[2] - suitable suitable Dipping suitable - -
suitable not not recommended[5][6] recommended[7]
suitable suitable suitable
- - -
[3] [4]
[5] [6] [7]
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
16. Revision history
Table 10: Rev Date 02 20020509 Revision history CPCN Description Product data; second version. Supersedes data in data sheet PCF85xxC-2 family dated 1997 Feb 13 (9397 750 01773). Engineering Change Notice 853-2338 28170 dated 2002 May 09.
* * * *
01 19970213 -
The format of this specification has been redesigned to comply with Philips Semiconductors' new presentation and information standard. Figure 1 "Block diagram." modified. Figure 3 "Device addressing." added. Figure 6 "Page write operation; eight bytes." corrected.
Product data; initial version (as PCF85xxC-2 family, 9397 750 01773).
9397 750 08536
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 09 May 2002
18 of 20
Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
17. Data sheet status
Data sheet status[1] Objective data Preliminary data Product status[2] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] [2]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
18. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
20. Licenses
Purchase of Philips I2C components
19. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 08536
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 09 May 2002
19 of 20
Philips Semiconductors
PCF8582C-2
256 x 8-bit CMOS EEPROM with I2C-bus interface
Contents
1 2 3 4 5 6 6.1 6.2 7 8 8.1 8.1.1 8.1.2 8.1.3 8.1.4 8.1.5 9 10 11 12 13 14 15 15.1 15.2 15.2.1 15.2.2 15.2.3 15.3 15.3.1 15.3.2 15.4 16 17 18 19 20 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Device addressing . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 6 I2C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . . 6 Bus conditions . . . . . . . . . . . . . . . . . . . . . . . . . 6 Data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Device addressing . . . . . . . . . . . . . . . . . . . . . . 7 Write operations . . . . . . . . . . . . . . . . . . . . . . . . 7 Read operations . . . . . . . . . . . . . . . . . . . . . . . . 9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 10 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 10 I2C-bus characteristics . . . . . . . . . . . . . . . . . . 11 Write cycle limits . . . . . . . . . . . . . . . . . . . . . . . 12 External clock timing . . . . . . . . . . . . . . . . . . . . 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Surface mount packages . . . . . . . . . . . . . . . . 16 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 16 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 17 Through-hole mount packages . . . . . . . . . . . . 17 Soldering by dipping or by solder wave . . . . . 17 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 17 Package related soldering information . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
(c) Koninklijke Philips Electronics N.V. 2002. Printed in the U.S.A
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 09 May 2002 Document order number: 9397 750 08536

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